Post Silicon Validation Engineer
- Experience Range: 5+ YOE
- Job Location: Hanoi & HCM
- Duty & Responsibilities:
– Full chip test plan development/modification
– Testbench development/modification
– Test case development, coding, execution, bug analysis
– Regressions, coverage analysis
– Verification closure
– Post silicon validation, scripting in Pre/Post Si environment
– Should have worked on full life cycle right from Spec to deliverables preferably on both Pre and Post silicon validation.
– Technically should be hands on and expected to drive the program on technical front and take full ownership
– Hands on C/Python scripting/test case development, execution and debug
– 18 paid leaves per year (including 12 annual leaves + 6 personal leaves).
– Insurance plan based on full salary + 13th salary + Performance Bonus.
– 100% full salary in probation period.
– Medical Benefit (Personal) and Family based on levels.
– Working in a fast paced, flexible, and multinational working environment. Chance to travel onsite (in 49 countries).
– Internal Training (Technical & Functional). Scope of English Training.
– Working time: 8:30 am-6:00 pm from Mondays to Fridays.
- Preferred Language for Application: English