Logic Verification Design Engineer - HCL Vietnam

Logic Verification Design Engineer

  • Experience Range: 2-10 Years
  • Job Location: HCMC, Hanoi
  • Duty & Responsibilities:

    At HCL Technologies Vietnam, creativity and innovation take wings as we engineer next gen technology services. We are committed to hire the best and offer a work environment that will help you thrive. We are looking for individuals who will:

    – Be responsible for managing technology in projects and providing technical guidance or solutions for work completion
    – Be responsible for providing technical guidance or solutions
    – Develop and guide the team members in enhancing their technical capabilities and increasing productivity
    – Prepare and submit status reports for minimizing exposure and risks on the project or closure of escalations
    – Ensure process compliance in the assigned module, and participate in technical discussions or review

  • Requirements:

    – Experience on logic design, lint check, synthesis, equivalence check, CDC verification
    – Experience on logic verification, System Verilog, UVM, Code Coverage, Assertions
    – Experience on chip level verification, ARM cores, Protocols (PCIe, Ethernet, USB, DDR) etc.
    – Experience on following tools: Design Compiler, Formality, Conformal, Spyglass
    – Good command of English. Have chance to work onsite in Japan

  • Preferred Language for Application: English


– Develop career comprehensively in global projects
– Intensive technical training, practice in innovative research centers and command of English language
– Receive allowance up to 6 million VND/ month in 3-month OJT, laptop for working and free parking lot
– Starting salary up to 15 million VND/ month, 13th month salary and bonus according to projects
– Insurance as per laws and regulations
– Professional working environment
– Hybrid working from Monday to Friday
– 18 annual leave days
– On-site opportunities in 52 nations

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